Reconfiguration of a clock multiplier unit (CMU) PLL in an ALTGX megafunction might fail for Stratix IV GX

In an ALTGX megafunction, reconfiguration of a clock multiplier unit (CMU) PLL might fail if the CMU PLL drives a transmitter channel using a central clock divider through X4/XN and either

• The transceiver channel is in bonded mode configuration, or
• The Use central clock divider to drive the transmitter channels using X4/XN lines option on the Main PLL page of the Reconfiguration Settings tab is on.

Set location assignments to place the CMU PLL that drives a transceiver channel using a central clock divider at location CMU0 PLL.