Article ID: 000077561 Content Type: Troubleshooting Last Reviewed: 04/12/2023

Why is "Report DDR" timing report missing when I have multiple instances of a wide external memory interface?

Environment

    Quartus® II Subscription Edition
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Description

Due to a problem in a timing script for the Quartus® II software version 12.1SP2 and earlier, a design with multiple instances of wide (typically x72 bits or more) external memory interfaces might not show the ‘Report DDR’ timing report. If the "Report DDR" timing report is shown then this problem does not affect your design.

 

Resolution

Follow these steps:

  1. Identify and open the <project_name>_p0_report_timing_core.tcl.
  2. Look for the line with the keyword num_path.
  3. Make the following change in that line:

From:

set num_paths 5000

 

To:

set num_paths 10000

 

 

This problem  is fixed starting with the Quartus® II software version 13.0.

 

Related Products

This article applies to 5 products

Stratix® V FPGAs
Stratix® V GX FPGA
Stratix® V GT FPGA
Stratix® V GS FPGA
Stratix® V E FPGA

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