Article ID: 000077463 Content Type: Troubleshooting Last Reviewed: 01/09/2023

Why does my F-Tile Ethernet Intel® FPGA Hard IP Design Example fail to place 50G-2 OTN Variant in FHT0 and FHT1 location ?

Environment

  • Intel® Quartus® Prime Pro Edition
  • Ethernet
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT

    Critical Issue

    Description

    Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 21.2, the F-Tile Ethernet Intel® FPGA Hard IP Design Example will fail to place the 50GE-2 Variant (all modes) in FHT0 and FHT 1 location.

    Resolution

    The 50GE-2 Variant can be placed in FHT2 and FHT3 locations.

    This problem is fixed starting with the Intel® Quartus® Prime Pro Edition Software version 21.3.

    Related Products

    This article applies to 1 products

    Intel Agilex® 7 FPGAs and SoC FPGAs I-Series