How do I assign non 3.0-V I/O standard for nPERST pins of Stratix® 10 PCI Express* Hard IP?

In some Stratix® 10 FPGA designs, the 3V I/O bank will not be used as a 3.0V signal input and output. And VCCIO3V will be connected to the power supply, which is not 3.0V, but, as 1.8V or 1.2V, which could share the same power plane with other banks.

Under this condition, the dedicated pins nPERST[L,R][0:2] have to be assigned a non-3.0-V I/O standard.

So the fitter error may be encountered when nPERST[L,R][0:2] pins are assigned to a 3.0-V I/O standard without any additional assignments. 

Add 'set_instance_assignment -name USE_AS_3V_GPIO ON -to <signal>' to your QSF file if you are intentionally trying to use a non 3.0-V standard on this pin.

For instance:

    set_instance_assignment -name IO_STANDARD "1.8 V" -to pcie_rstn_pin_perst -entity pcie_example_design
    set_instance_assignment -name USE_AS_3V_GPIO ON -to pcie_rstn_pin_perst -entity pcie_example_design