Article ID: 000077445 Content Type: Troubleshooting Last Reviewed: 05/24/2019

Why aren’t the tx_polinv and rx_polinv ports available when using the transceiver Native PHY IP in Enhanced PCS mode for Intel® Arria® 10 and Cyclone® 10 devices?

Environment

Bug ID: 15007199522

Quartus Edition

Intel® Quartus® Prime Pro Edition

Version Found: 18.1

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Description

The transceiver Native PHY IP for Intel Arria 10 and Cyclone 10 devices in Enhanced PCS mode does not have tx_polinv and rx_polinv ports.

Resolution

You can use the Gearbox Enable RX data polarity inversion and Enable TX data polarity inversion settings to implement static polarity inversion.

You can implement dynamic polarity inversion by reconfiguring the PHY with different Gearbox Enable RX data polarity inversion and Enable TX data polarity inversion settings.

Description
Resolution

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