Article ID: 000077318 Content Type: Troubleshooting Last Reviewed: 04/29/2021

Is there any error regarding the Intel® Stratix® 10 L- and H-Tile Standard PCS data rate support in user guide

Environment

  • Intel® Quartus® Prime Pro Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT

    Critical Issue

    Description

    In the document of the Intel® Stratix® 10 L- and H-Tile Transceiver PHY User Guide (UG-20055 | 2019.10.25)  chapter 1 Table 5 , it indicates Standard PCS data rate supports for L-tile -2 Speed Grade and H-tile -1/-2 Speed Grade is 10.81344 Gbps. This is incorrect for maximum data rate support. 

    Resolution

    The data rate supporting above can be up to 12 Gbps with proper Intel® Stratix® 10 L- and H-Tile Transceiver Native PHY FPGA IP parameter setting. The document is updated in version 20.4

    Related Products

    This article applies to 4 products

    Intel® Stratix® 10 GX FPGA
    Intel® Stratix® 10 MX FPGA
    Intel® Stratix® 10 TX FPGA
    Intel® Stratix® 10 SX SoC FPGA

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