Article ID: 000077161 Content Type: Troubleshooting Last Reviewed: 05/13/2014

RapidIO II IP Core Does Not Set RESPONSE_VALID in Port 0 Link Maintenance Response CSR After Transmitting link-request reset-device Control Symbol

Environment

    Quartus® II Subscription Edition
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Critical Issue

Description

After the RapidIO II IP core sends a link-request reset-device control symbol on the RapidIO link, it should set the RESPONSE_VALID bit in the Port 0 Link Maintenance Response CSR (offset 0x144). However, the IP core does not set the register bit in this case.

Resolution

This issue has no workaround.

This issue will be fixed in a future version of the RapidIO II MegaCore function.

Related Products

This article applies to 1 products

Intel® Programmable Devices

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