Article ID: 000077084 Content Type: Troubleshooting Last Reviewed: 11/26/2012

Is there a problem with the LVDS input with differential on chip termination (OCT) IBIS model for Stratix V, Arria V, and Cyclone V devices?

Environment

    Quartus® II Subscription Edition
BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

Yes, when using the Quartus® II software to generate preliminary IBIS models for Stratix® V, Arria® V, and Cyclone® V devices, the differential input models with differential OCT enabled will not work properly. This includes all differential I/O standards such as LVDS, mini-LVDS, and RSDS. 

There is a DC shift on the received LVDS signals which affects the positive and negative signal crossing points making the model unusable.

Resolution

You can place a 100 ohm resistor directly across the input pins of the differential receiver without using transmission lines between the resistor and the receiver pins.  This will closely replicate the function of the differential OCT.

This problem is scheduled to be fixed in the final versions of the device IBIS models which will be available in a future release of the Quartus II software.

Related Products

This article applies to 15 products

Cyclone® V SX SoC FPGA
Cyclone® V GT FPGA
Stratix® V GX FPGA
Cyclone® V GX FPGA
Stratix® V GT FPGA
Stratix® V GS FPGA
Arria® V GZ FPGA
Arria® V SX SoC FPGA
Cyclone® V ST SoC FPGA
Arria® V ST SoC FPGA
Arria® V GX FPGA
Arria® V GT FPGA
Cyclone® V E FPGA
Stratix® V E FPGA
Cyclone® V SE SoC FPGA

1

Need more help?

Contact support

Disclaimer

1

All postings and use of the content on this site are subject to Intel.com Terms of Use.