Due to a problem with the Altera® Hard IP for PCI® Express variants which use the Soft Reset Controller (SRC), might not leave the hot reset state within the required time.
Note: Gen2 designs in Quartus release 13.1 or later, and all Gen 3 designs, for the Stratix V and Arria V GZ devices, require use of the SRC. Other devices do not use the SRC.
The sequence for hot reset is as follows:
- The PCIe host initiates a hot reset and enters its hot reset state.
- The Hard IP enters it\'s hot reset state.
- Once the PCIe host leaves it\'s hot reset state, the Hard IP should remain in hot reset for an additional 2ms and then exit to Detect.Quiet, per the PCIe specification.
However in designs which use the SRC, the 2ms timeout will be restarted if the receivers toggle locked_to_data on any of the active lanes. If there is excessive noise on any of the lanes, the receivers might toggle locked_to_data. Each toggle of locked_to_data causes the 2ms counter to be restarted, potentially forever, leaving the Hard IP in a constant hot reset state.
To work around this issue, perform the following steps.
Open the file altpcie_rs_serdes.v,
Find and comment out the code below
dl_ltssm_r <= ltssm;
dl_ltssm_rr <= dl_ltssm_r;
if ((dl_ltssm_r == 5\'h14) && (rx_signaldetect_sync[7:0]==8\'h0) && (hotreset_cnt>20\'h0)) begin
hotreset_cnt <= hotreset_cnt-20\'h1;
end
else begin
hotreset_cnt <= (test_sim==1\'b1)?20\'h10:(rc_inclk_eq_125mhz==1\'b1)?20\'h3D091:20\'h7A121;
end
hotreset_2ms <= (hotreset_cnt==20\'h1)?1\'b1:1\'b0;
Insert the following lines:
dl_ltssm_r <= ltssm;
dl_ltssm_rr <= dl_ltssm_r;
if((dl_ltssm_r == 5\'h14) && (dl_ltssm_rr != 5\'h14)) begin
hotreset_cnt <= (test_sim==1\'b1)?20\'h10:(rc_inclk_eq_125mhz==1\'b1)?20\'h3D091:20\'h7A121;
end
if(hotreset_2ms == 1\'b1) begin
exits_hotreset <= 1\'b0;
end
else if ((dl_ltssm_r == 5\'h14) && (rx_signaldetect_sync[7:0]==8\'h0)) begin
exits_hotreset <= 1\'b1;
end
if ((exits_hotreset == 1\'b1) && (hotreset_cnt > 20\'h0)) begin
hotreset_cnt <= hotreset_cnt-20\'h1;
end
hotreset_2ms <= (hotreset_cnt==20\'h1)?1\'b1:1\'b0;
