Due to a problem in the Intel® Quartus® Prime Pro Edition software version 20.1, you may see the error message above in Platform Designer. This problem occurs when you generate HDL of NCO Intel® FPGA IP Core
To work around this problem you can generate the NCO Intel® FPGA IP in the Intel® Quartus® Prime Pro Edition software version 19.4 and use the v19.4 RTL files in Intel® Quartus® Prime Pro Edition software version 20.1.
This problem is fixed starting with the Intel® Quartus® Prime Pro Edition software version 20.2.