Article ID: 000076897 Content Type: Product Information & Documentation Last Reviewed: 05/16/2023

How does the Intel® Arria® 10 device know if the configuration mode is Fast Passive Parallel (FPP) or Passive Serial (PS) when the MSEL pin setting is the same for both modes?

Environment

    Quartus® II Subscription Edition
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Description

In Intel® Arria® 10 devices the MSEL pins encode whether the device is operating in a Passive configuration mode (FPP/PS) or an Active mode (Active Serial (AS)). There is no separate MSEL setting that differentiates PS mode from FPP mode.

 

 

 

 

Resolution

The Intel® Arria® 10 devices configuration control block will look for certain data patterns during the start of the passive configuration process. When the external host transfers the configuration data in different data widths such as in PS (DATA0) , FPPx8 (DATA[7..0]), FPPx16(DATA[15..0]) and FPPx32(DATA[31..0]), the configuration control block will decipher the mode by detecting a certain pattern being latched on these DATA pins. The patterns will be different in different passive modes based on the data width size.

Related Products

This article applies to 4 products

Intel® Arria® 10 FPGAs and SoC FPGAs
Intel® Arria® 10 GT FPGA
Intel® Arria® 10 GX FPGA
Intel® Arria® 10 SX SoC FPGA

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