Article ID: 000076826 Content Type: Error Messages Last Reviewed: 08/18/2020

Error: Failed to generate example design example_design to: /current_directory/intel_pcie_ptile_avmm_0_example_design

Environment

  • Intel® Agilex™ FPGAs and SoC FPGAs
  • Intel® Stratix® 10 DX FPGA
  • Intel® Quartus® Prime Pro Edition
  • Avalon-MM Intel® Stratix® 10 Hard IP for PCI Express
  • PCI Express
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    Due to a problem in the Intel® Quartus® Prime Pro Edition software version 20.2 and earlier, you may see this error when trying to generate the example design for the Intel® FPGA P-Tile Avalon® Memory Mapped IP for PCI Express* with “Enable HIP dynamic reconfiguration of PCIe registers” feature enable. 

    Resolution

    This problem is fixed starting with the Intel Intel® Quartus® Pro Edition software version 20.3.

    Disclaimer

    1

    All postings and use of the content on this site are subject to Intel.com Terms of Use.