Article ID: 000076759 Content Type: Troubleshooting Last Reviewed: 12/29/2019

*** Fatal Error: Segment Violation: faulting address=0x30 when compiling a project with the Intel® Arria® 10 PHYLite IP

Environment

  • Intel® Quartus® Prime Pro Edition
  • External Memory Interfaces Intel® Arria® 10 FPGA IP
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    Due to a problem in the Intel® Quartus® Prime Pro Edition Software versions 19.3, 19.2, 19.1 and 18.1, you may see the following error messages when compiling for the Intel Arria® 10 PHYLite IP with a data width setting such as 24. This issue occurs when a x36 PHYLite (which instantiates 4 I/O lanes) has less than 27 I/Os (which requires 3 I/O lanes), and therefore, the "dangling" 4th I/O lane will have no buffer which causes the errors.

    *** Fatal Error: Segment Violation: faulting address=0x30, PC=0x7fe2165bd868 : 0x7fe2165bd868: periph_emif!EMIF_GEN6_EMIF_SYSTEM::create_dq_group_cells() 0x1cc

    Module: quartus_fit

    Stack Trace:     

    0xf935: ERR_UNWINDER_BACKTRACE::get_stack_trace(void const**, int, int, void*) 0x101 (ccl_err)   

    0x73360: msg_ie_get_call_stack(void*) 0xfb (ccl_msg)   

    0x74863: MSG_INTERNAL_ERROR::report_fatal(char const*, void*) 0x3f (ccl_msg)   

    Resolution

    This problem is fixed starting with the Intel® Quartus® Prime Pro Edition software version 20.1.

    Related Products

    This article applies to 1 products

    Intel® Arria® 10 FPGAs and SoC FPGAs