It is due to the reason that Triple Speed Ethernet’s transceiver reset sequence logic is clocked by reference clock and Cyclone® IV GX dedicated reference clock for transceiver cannot be routed to global clock network.
The following patch provides a solution to ensure no fitting error in CIV GX family devices due to global clock network limitation.
Please download the appropriate Quartus® II software version 10.1SP1 patch 1.77 from the following links:
You must either have previously installed the Quartus II 10.1 SP1 software or must install the Quartus II 10.1 SP1 software before installing this patch. Otherwise, the patch will not be installed correctly and the Quartus II software will not run properly.
After you install the patch please regenerate your Triple Speed Ethernet MegaCore® before you compile your design.