Article ID: 000076593 Content Type: Troubleshooting Last Reviewed: 06/15/2017

Can I use a 161 MHz clock for the Avalon-MM clock of the Stratix 10 10GBASE-KR PHY IP Core?

Environment

  • Intel® Stratix® 10 FPGAs and SoC FPGAs
  • Intel® Quartus® Prime Pro Edition
  • 1G 10GbE and 10GBASE-KR PHY Intel® FPGA IP
  • Ethernet
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    Yes, you can use up to a 161 MHz clock for the Avalon-MM clock of Stratix® 10 10GBASE-KR PHY IP Core. The Stratix 10 Device Datasheet restricts the transceiver reconfiguration clock frequency to 125 MHz but the Stratix 10 10GBASE-KR PHY IP Core is an exception. 

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