Article ID: 000076529 Content Type: Troubleshooting Last Reviewed: 11/20/2013

FIR Coefficient Reload May Get Delayed

Environment

    Quartus® II Subscription Edition
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Critical Issue

Description FIR Compiler II intermittently inserts unnecessary delay registers between a coefficient storage register and the multiplier that uses that coefficient. This issue may cause the first FIR iteration after a coefficient update or reset to be calculated using the wrong values. Once the correct coefficient value propagates through the delay registers, subsequent FIR iterations will be calculated correctly. This issue affects FIRs that use reloadable coefficients. FIRs that use constant coefficients are not affected.

This issue is fixed in version 12.0 of the FIR Compiler II MegaCore function.

Related Products

This article applies to 1 products

Intel® Programmable Devices

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