Article ID: 000076523 Content Type: Troubleshooting Last Reviewed: 03/08/2023

Why is the Run Driver Margins option unavailable in the EMIF Debug Toolkit when targeting the Intel Agilex® 7 FPGA devices?

Environment

    Intel® Quartus® Prime Pro Edition
    External Memory Interfaces Debug Component Intel® FPGA IP
    Memory Interfaces and Controllers
BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 20.3 and earlier, you may see that the “Run Driver Margins” option is unavailable in the EMIF Debug Toolkit.

 

 

Resolution

Follow the guidelines in the "Enabling the EMIF Toolkit in an Existing Design" section in the External Memory Interfaces Intel® Agilex® FPGA IP User Guide.

In addition, when connecting the Calibration IP and the EMIF IP in Platform Designer, click the emif_calbus in the Calibration IP first and then connect it to the emif_calbus in the EMIF IP.

This is fixed starting with the Intel® Quartus® Prime Pro Edition Software version 20.4.
 

Related Products

This article applies to 1 products

Intel Agilex® 7 FPGAs and SoC FPGAs

1