Article ID: 000076520 Content Type: Troubleshooting Last Reviewed: 11/11/2020

What can cause memory test data errors to occur when using the Intel® Stratix® 10 FPGA DDR4 EMIF IP configured for 16Gb size DDR4 memory devices ?


  • Intel® Quartus® Prime Pro Edition
  • External Memory Interfaces Intel® Stratix® 10 FPGA IP

    16Gb DDR4 memory device’s datasheets may show a tRFC1  (refresh to activate or refresh command period) timing parameter requirement greater than 350ns.

    Due to a problem in the Intel® Stratix® 10 DDR4 EMIF IP hard controller, if the DDR4 IP tRFC parameter on the Mem Timing tab is set to a value greater than 350ns, it may not operate correctly and can cause memory test data errors.

    There is no IP error message shown when using the EMIF IP in the Intel Quartus® Prime Pro Edition Software earlier than version 20.3.

    Starting from the Intel Quartus Prime Pro Edition Software version 20.3 and EMIF IP version 19.2.2,  the following error message is displayed:

    Error: The current device family supports a maximum tRFC value of 350ns, but the current value is 550.0. Please contact Intel for support.


    Where the tRFC1 parameter of greater than 350ns is required, the workaround is to change the fine granularity refresh mode so that refresh requests are issued more frequently but the DDR4 IP tRFC parameter does not exceed 350ns.  Check the timing parameters in the DDR4 DIMM and component datasheets. For DIMMs, refer to the tRFC1 parameter requirement in the serial presence detect (SPD) bytes 30 & 31.

    As an example, for a 16Gbit size memory device which has a fine granularity refresh Fixed 1x mode and tRFC1 requirement of 550ns, set the DDR4 IP refresh parameters as shown below for commercial temperature range operation : 

    On the Memory tab :

    Unselect Hide advanced mode register settings

    Set Fine granularity refresh = Fixed 2x


    On the Mem Timing tab :

    Set tRFC = 350ns (tRFC2 in the datasheet)

    Set tREFI = 3.9us

     For higher temperature range operation, the tREFI parameter must be decreased to the value shown in the DDR4 datasheet.


    Regenerate the DDR4 IP and recompile the project.

    Note that using the fine granularity 2x refresh mode can increase the DDR4 memory power consumption, especially when using high density memory devices. You should carefully analyze your DDR4 memory power delivery and thermal design.

    If the workaround is successful and the memory data tests now pass, no further action is required.

    Related Products

    This article applies to 1 products

    Intel® Stratix® 10 FPGAs and SoC FPGAs



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