Article ID: 000076474 Content Type: Error Messages Last Reviewed: 09/11/2012

Critical Warning: Output pin "c0" (external output clock of PLL "altpll0:inst|altpll:altpll_component|altpll0_altpll:auto_generated|pll1") uses I/O standard &lt:I/O standard>, has current strength <current strength>, output load <output load>, and output

Environment

  • Clock
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    For Cyclone® III and Cyclone IV devices, the Quartus® II software has different maximum clock output frequencies for different IO buffer settings. To achieve a higher clock output frequency, you can do the following:

    • Use a faster speed grade device
    • Select higher slew rate
    • Increase the drive strength

    It is also recommended for you to run IBIS simulations with your full system setup to determine the actual maximum output frequency at the system level.

     

    Critical Warning: Output pin "c0" (external output clock of PLL "altpll0:inst|altpll:altpll_component|altpll0_altpll:auto_generated|pll1") uses I/O standard &lt:I/O standard&gt;, has current strength &lt;current strength&gt;, output load &lt;output load&gt;, and output clock frequency of &lt;clock frequency&gt;, but target device can support only maximum output clock frequency of &lt;clock frequency&gt; for this combination of I/O standard, current strength and load

    Related Products

    This article applies to 2 products

    Cyclone® FPGAs
    Cyclone® III FPGAs