Article ID: 000076419 Content Type: Troubleshooting Last Reviewed: 02/05/2020

When using Windows* why does the Intel® Stratix® 10 Avalon® Memory Mapped Hard IP for PCIe* Design Example fail to generate?

Environment

  • Intel® Stratix® 10 GX FPGA
  • Intel® Stratix® 10 TX FPGA
  • Intel® Stratix® 10 SX SoC FPGA
  • Intel® Stratix® 10 MX FPGA
  • Intel® Quartus® Prime Pro Edition
  • Avalon-MM Intel® Stratix® 10 Hard IP for PCI Express
  • Windows

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    Description

    Due to a problem in the Intel® Quartus® Prime Pro Edition software version 19.2 and earlier for Windows*, the Intel® Stratix® 10 Avalon® Memory Mapped Hard IP for PCIe* Design Example fails to generate correctly.

    Resolution

    There is no workaround for this problem.

    The design example can be generated correctly with the Linux* version of the Intel® Quartus® Prime Pro Edition software version 19.2.

    This problem has been fixed for Windows* starting with the Intel® Quartus® Prime Pro Edition software version 19.3 and later.

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