Article ID: 000076388 Content Type: Troubleshooting Last Reviewed: 05/24/2023

Why is the RZQ pin location assignment ignored with the RZQ_GROUP assignment?

Environment

  • Intel® Quartus® Prime Pro Edition
  • OCT Intel® FPGA IP
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    A different RZQ pin location assignment may be reported after the project has been compiled successfully. 

    Resolution

    Add an I/O bank location assignment to the RZQ pin to work around this problem. There is only one RZQ pin per I/O bank, and therefore the RZQ pin will be assigned to the correct pin in the I/O bank.

    For example,

    set_location_assignment IOBANK_<Bank#> -to  <rzq_pin_name>~rzq_ibuf

    This is scheduled to be fixed in a future release of the Intel® Quartus® Prime Software.

    Related Products

    This article applies to 1 products

    Intel® Stratix® 10 FPGAs and SoC FPGAs