Article ID: 000076386 Content Type: Product Information & Documentation Last Reviewed: 06/25/2020

How does temperature affect the Intel® Stratix® 10 HBM2 interface efficiency and bandwidth?


  • Intel® Quartus® Prime Pro Edition

    There are two main temperature effects that reduce the bandwidth available for data transfers in the Intel® Stratix® 10 HBM2 interface :

    1) The HBM2 is exceeding a temperature threshold set in the Intel HBM2 IP parameter General > Threshold temperature for AXI throttling along with a value for the AXI throttling ratio

    2) Above 85C, HBM2 refreshes occur more frequently, so there is less bandwidth available for data transfers. At 85C, the refresh rate is 2x, and at 95C, 4x more frequent than the standard refresh time interval of 7.8 microseconds.

    The HBM2 TEMP register value can be read back via the AXI APB bus to help with the correlation of memory refreshes, temperature and data bandwidth.

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    Intel® Stratix® 10 MX FPGA