If the EMIF PLL reference clock is also connected to the reference clock input of a separate I/O PLL in the same I/O column, you may see similar errors:
Error(14996): The Fitter failed to find a legal placement for all periphery components
Info(14987): The following components had the most difficulty being legally placed:
Info(175029): IO_AUX emif_1|emif_1|arch|arch_inst|io_aux_inst|io_aux (43%)
Info(175029): HSSI_PMA_AUX ALTERA_RESERVED_FITTER_INSERTED_PMA_AUX1 (29%)
Info(175029): EMIF_GROUP EMIF_0_emif_1 (29%)
This use case isn’t supported. You will need to use a separate reference clock for the non-EMIF I/O PLL.