Article ID: 000076334 Content Type: Product Information & Documentation Last Reviewed: 10/23/2020

How can the EMIF Debug Toolkit support multiple Intel® Agilex® EMIF Interfaces?

Environment

  • Intel® Quartus® Prime Pro Edition
  • External Memory Interfaces Debug Component Intel® FPGA IP
  • Memory Interfaces and Controllers
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    In the Intel® Quartus® Prime Pro Edition Software version 20.2 and later, the EMIF Debug Toolkit can support multiple EMIF Interfaces in the same or different rows by following the guidelines in the "Configuring a Design to Use the Toolkit" section in the External Memory Interfaces Intel® Agilex® FPGA IP User Guide.

    In addition, ensure that all the IPs are added into one single .qsys file.

    Note: USB-Blaster II should be used when you try to use the EMIF Debug Toolkit.

     

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    Intel® Agilex™ 7 FPGAs and SoC FPGAs

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