Article ID: 000076297 Content Type: Troubleshooting Last Reviewed: 07/13/2017

why do I see the Thevenin Parallel Termination of Address and command signals on Altera DDR4 HiLo daughter card ?

Environment

BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

Since the VTT regulator is not mounted on Altera DDR4 HiLo daughter card termination scheme is hevenin Parallel Termination, but you can chose Vtt termination if you can mount the VTT power regulator.

 

 

Related Products

This article applies to 2 products

Intel® Stratix® 10 FPGAs and SoC FPGAs
Intel® Arria® 10 FPGAs and SoC FPGAs

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