Article ID: 000076253 Content Type: Troubleshooting Last Reviewed: 04/15/2020

Why does the DMA test of the Intel® FPGA P-Tile Avalon® Memory Mapped (Avalon-MM) IP for PCI express* generated example design causes the host system to hang?

Environment

  • Intel® Stratix® 10 DX FPGA
  • Intel® Agilex™ F-Series FPGAs and SoC FPGAs
  • Intel® Quartus® Prime Pro Edition
  • Avalon-MM Intel® Stratix® 10 Hard IP for PCI Express
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    Critical Issue

    Description

    Due to a problem in the Intel® Quartus® Prime Pro Edition software version 19.4, you may encounter above issue when performing the DMA test of the Intel® FPGA P-Tile Avalon® Memory Mapped (Avalon-MM) IP for PCI express* generated example design.

    Resolution

    This problem has been fixed in the Intel® Quartus® Prime Pro Edition software versions 20.1

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