Critical Issue
The demonstration testbench for 40GBASE-KR4 variations of the 40- and 100-Gbps Ethernet MAC and PHY IP core cannot simulate successfully with the Cadence NCSIM simulator.
The error is in the run_ncsim.sh simulator script. The following example error message indicates the failure:
ncelab: *E,CUVMUR (./alt_e40_avalon_kr4_tb.sv,1213|14):
instance ‘alt_e40_avalon_kr4_tb.reco_bundle_1’ of design unit ‘sv_rcn_bundle’
is unresolved in ‘work.alt_e40_avalon_kr4_tb: module’.
Two options are available to you to work around this issue.
You can simulate the 40GBASE-KR4 40-100GbE IP core demonstration testbench with the Mentor Graphics ModelSim simulator.
Alternatively, you can edit your testbench files. You must also clean up following an unsuccessful simulator run with the unedited files.
The following changes ensure that your IP core testbench files are compatible with the Cadence NCSIM simulator:
- Change directory to <instance>_example/alt_e40_e100/example_testbench.
- Open the file run_ncsim.sh in a text editor and replace the following existing line with the following new command:
- Open the file kr4_example_files.txt in a text editor and remove the following two lines:
- Remove the libraries directory created by your unsuccessful simulation run using the unedited run_ncsim.sh file.
Replace this existing line:
ncvlog -F ./kr4_example_files.txt
with this replacement command:
ncvlog -sv -F ./kr4_example_files.txt
../example/common/alt_e40_e_reco/alt_e40_e_reco/altera_xcvr_functions.sv
../example/common/alt_e40_e_reco/alt_e40_e_reco/xv_xcvr_h.sv
This issue is fixed in version 14.0 of the 40- and 100-Gbps Ethernet MAC and PHY MegaCore function.