Article ID: 000076232 Content Type: Error Messages Last Reviewed: 02/08/2016

Error (11686): Your design contains more than two ATX (LC) PLLs in the same HSSI transceiver bank

Environment

  • Arria® V GZ FPGA
  • Stratix® V GT FPGA
  • Stratix® V GX FPGA
  • Stratix® V GS FPGA
  • Intel® Quartus® Prime Pro Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    You might see the above Fitter error in Quartus® Prime software version 15.1 with Stratix® V and Arria V GZ devices.

    The reason for the error is because the Quartus Prime software version 15.1 software fails to merge two or more ATX PLLs.

    Resolution

    To work around this problem, you can use Quartus Prime software version 15.1.1 or later.

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