Article ID: 000076228 Content Type: Troubleshooting Last Reviewed: 09/11/2012

Why does my inferred RAM behave differently in the Quartus II software version 5.1 than in version 5.0?

Environment

BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

When the Quartus® II software version 5.1 infers RAM blocks from your source code, Quartus II integrated synthesis may implement the logic around the RAM block with the clock enable input of the RAM. This can result in behavior different from Quartus II software version 5.0 and earlier. This problem does not occur if you use a MegaWizard-generated RAM block or a third-party synthesis tool.

This problem has been fixed beginning with the Quartus II software version 6.0.

Related Products

This article applies to 1 products

Stratix® II FPGAs

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