Article ID: 000075982 Content Type: Troubleshooting Last Reviewed: 01/01/2015

What can I do with the programmable logic device PLD configuration pins on my HardCopy device?

Environment

    Quartus® II Subscription Edition
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Description

In HardCopy® devices, you can choose one of three different operation modes. Each mode has different configuration pin requirements. Below is a brief description of the modes.

 

1. Instant on

The CONF_DONE pin goes high after the power-on reset (POR) delay. In this case, configuration input pins can be left floating.

2. Instant on with delay

The CONF_DONE pin goes high 50 ms after the POR delay. In this case, configuration input pins can be left floating.

3. PLD configuration emulation

The HardCopy configuration control and clock input pins should be driven in the same manner as the PLD, and no inputs may be left floating. To find out more about the status of configuration pins for SRAM-based devices, see the Configuration Handbook.

 

In all cases, activity on the nSTATUS, nCONFIG, DCLK, and DATA pins is ignored in a HardCopy device.

 

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Intel® Programmable Devices

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