Article ID: 000075968 Content Type: Troubleshooting Last Reviewed: 04/03/2023

Why do I get the following error when the PERST pin of the Stratix® V Hard IP for PCI Express I/O Standard is set to 1.5V in the Quartus® II software v14.1?

Environment

  • Quartus® II Subscription Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT

    Critical Issue

    Description

    Error (169029): Pin pin_perst is incompatible with I/O bank 3B.

    Pin uses I/O standard 2.5 V, which has a VCCIO requirement incompatible with that bank's VCCIO setting or its other pins that use VCCIO 1.5V.

    Due to a problem in the Quartus® II software v14.1, I/O standard checking is too restrictive.

    Resolution

    To work around this problem in the Quartus II software v14.1.

    1. Remove the location assignment of pin_perst.
    2. Add a quartus.ini file in your project directory with: dft_skip_oct_vccn_check = on

    No plan to fix.

    Related Products

    This article applies to 2 products

    Stratix® V FPGAs
    Intel® FPGA Development Kits