Article ID: 000075833 Content Type: Troubleshooting Last Reviewed: 09/26/2014

ODT Signal Not Functioning Correctly for DDR2 and DDR3 Hard Memory Interfaces Targeting Arria V or Cyclone V Devices

Environment

  • Quartus® II Subscription Edition
    • BUILT IN - ARTICLE INTRO SECOND COMPONENT

    Critical Issue

    Description

    This problem affects DDR2 and DDR3 products.

    For DDR2 and DDR3 interfaces targeting Arria V or Cyclone V devices, the ODT signal from the hard memory controller may not operate correctly.

    Resolution

    This issue has no workaround.

    This issue is fixed in version 13.0 and later.

    Related Products

    This article applies to 2 products

    Cyclone® V FPGAs and SoC FPGAs
    Arria® V FPGAs and SoC FPGAs

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