Description According to the Cyclone device datasheet, Cyclone PCI is designed to be fully compliant with the 3.3V PCI Local Bus Specification (Rev. 2.1) and meets 32 bit/66 MHz operating frequency and timing requirements.
The 32 bit/66 MHz PCI interface requires 49 pin. Due to the required pin count and logic function of PCI, the PCI functions are implemented at the left and right half of the chip. Also, output register should be the I/O register to guarantee the 6ns requirements.
EP1C3 will not support PCI because PCI interface requires a significant portion of the available device resources.