Article ID: 000075750 Content Type: Product Information & Documentation Last Reviewed: 04/14/2024

How can I use a Verilog HDL header file that contains only parameter values?

Environment

  • Intel® Quartus® Prime Design Software
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    Use the `include directive to include all your header files within the module body.

    When synthesizing header files in the Quartus® Prime Software, do not add the header file to the list of files in the Quartus® Prime project. Header files should not be analyzed as separate Verilog HDL files. Instead, use the `include directive so that the header file is correctly analyzed when the top-level file is analyzed by the Quartus® Prime Software.

    If you add a header file containing only parameter values to the list of files in the Quartus® Prime project, you may see an error like the following:

    Error (10839): Verilog HDL error at <filename>.v(<line number>): declaring global objects is a SystemVerilog feature

     

    Resolution

    The following example instantiates an lpm_dff function with its parameter set in another file (param.v).

    . . .
    //file : dffveri.v

    module dffveri (q, data, clock);
    `include "param.v"

    //parameter width = 5;
    //coming from param.v

    input [width-1:0] data;
    input clock;
    output [width-1:0] q;

    lpm_dff dfff (.data(data), .clock(clock), .q(q));
    defparam dfff.lpm_width = width;

    endmodule
    . . .

    //file param.v

    parameter width = 5;

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    Intel® Programmable Devices