Article ID: 000075727 Content Type: Troubleshooting Last Reviewed: 10/01/2013

For Fast Passive Parallel (FPP) configuration, if the data is sent in bursts should the clock be paused and the data line be tri-stated during periods without data present?

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BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description Yes, for FPP configuration it is recommended to pause DCLK and tri-state the data lines for periods of inactivity. If DCLK is still toggling when there is no actual data present, invalid data may be captured.

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Intel® Programmable Devices

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