Article ID: 000075691 Content Type: Troubleshooting Last Reviewed: 04/18/2022

Why do some compilations of my design with the Intel® L-/H-Tile Avalon® streaming IP for PCI Express* result in an unresponsive PCI Express* link?

Environment

    Intel® Quartus® Prime Pro Edition
    PCI Express
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Critical Issue

Description

Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 21.1 and 21.2, you may experience an unresponsive PCI Express* link if you have the Transaction Layer Configuration Space Interface enabled in your Intel® L-/H-Tile Avalon® streaming IP for PCI Express* configured as a Gen3x16 link. The problem does not impact all compilation results as it is due to a place/route dependency.

The unresponsive PCI Express* link may happen after a power-on configuration operation or after a reconfiguration operation.

Additional failure symptoms for the issue described are:

  • The Transaction Layer Configuration Space Interface (tl_cfg_*) ports are stuck at a fixed value.
  • No DMA operations happen between the root port and the end-point
  • Performing a warm reset in the host system allows the end-point to recover its functionality
Resolution

A patch is available to fix this problem for the Intel® Quartus® Prime Edition Pro Software version 21.1 and 21.2.

Download and install Patch 0.41 for the Intel® Quartus® Prime Edition Pro Software version 21.1 or Patch 0.05 for the Intel® Quartus® Prime Edition Pro Software version 21.2 from the appropriate link below:

(To download the .run file, right-click on the above link and choose “Save link as”)

 

Intel® Quartus® Prime Edition Pro Software version 21.1 patch

 

Intel® Quartus® Prime Edition Pro Software version 21.2 patch

 

This problem is fixed starting with the Intel® Quartus® Prime Pro Edition Software version 21.3.

Related Products

This article applies to 4 products

Intel® Stratix® 10 GX FPGA
Intel® Stratix® 10 TX FPGA
Intel® Stratix® 10 SX SoC FPGA
Intel® Stratix® 10 MX FPGA

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