Article ID: 000075687 Content Type: Error Messages Last Reviewed: 11/18/2024

Error(15360): DSP block WYSIWYG primitive "u0|a10_native_fixed_point_dsp_0|twentynm_mac_component" has unconnected port ACLR[0] -- port must be connected because corresponding register is used

Environment

    Intel® Quartus® Prime Pro Edition
    Native Fixed Point DSP Intel® Arria® 10 FPGA IP
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Description

Due to a problem in the Quartus® Prime Pro Edition Software version 20.3 and later, you may see this error when you are using the Arria® 10 Native Fixed Point DSP IP. The error happens because the user is enabling registers for "az" and "bz" but not using the "az" and "bz" ports.

Resolution

To avoid this error, disable the registers for "az" and "bz" in Data "z" Configuration if you are not using "az" and "bz" ports.

This error is planned to be fixed in a future release of the Quartus® Prime Pro Edition Software.

Related Products

This article applies to 1 products

Intel® Arria® 10 FPGAs and SoC FPGAs

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