Article ID: 000075594 Content Type: Troubleshooting Last Reviewed: 07/12/2021

Why does the P-Tile Debug Toolkit Eye Viewer show the eye diagram results generated for the previous lane ?

Environment

  • Intel® Stratix® 10 DX FPGA
  • Intel® Agilex™ F-Series FPGAs and SoC FPGAs
  • Intel® Quartus® Prime Pro Edition
  • Avalon-ST Intel® Stratix® 10 Hard IP for PCI Express
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    Description

    Due to a problem in the Intel® Quartus® Prime Pro Edition software version 21.2, the eye diagram results displayed on the right of the eye diagram are not
    updated if you continue to plot eye diagram for another lane by selecting a different lane number from the channel drop down option at the top left corner
    of the Eye Viewer window.

    The eye diagram results shown are for the previous lane.

    Resolution

    To work around this problem, from the P-Tile Debug Toolkit Tool menu, start a new Eye Viewer tab and select a different lane number.

    This problem is scheduled to be fixed in a future release of the Intel® Quartus® Prime Pro Edition software.

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