Article ID: 000075586 Content Type: Troubleshooting Last Reviewed: 04/01/2021

Why does the Interlaken (2nd Generation) Intel® FPGA IP Design Example fail to work when targetting the Intel® Stratix® 10 TX Transceiver Signal Integrity Development Kit?

Environment

  • Intel® Stratix® 10 TX FPGA
  • Intel® Quartus® Prime Pro Edition
  • Interlaken (2nd Generation) Intel® FPGA IP
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT

    Critical Issue

    Description

    The Interlaken (2nd Generation) Intel® FPGA IP Design Example will fail in hardware when "Select Board" parameter is set to "Intel® Stratix® 10 TX Signal Integrity Development Kit -E-tile". The hardware test will fail with the symptom of word_locked and sync_locked signals not being asserted.

    This problem is due to incorrect location assignments in the auto-generated design example Intel® Quartus® Settings File (QSF).

    Resolution

    To work around this problem in the Intel® Quartus® Prime Pro Edition Software version 20.4 and earlier, manually change the following QSF assignments when targetting the Intel® Stratix® 10 TX Signal Integrity Development Kit - E-Tile.

     

    For Intel® Stratix 10® TX Signal Integrity Development Kit, E-Tile NRZ Configurations:

    Signal NameAssignment in v20.4 and earlierCorrect Assignment
    pll_ref_clk[0]PIN_AB37PIN_AN40
    refclk_preserve_bti_ch0PIN_AN40PIN_BC18
    refclk_preserve_bti_ch1PIN_AB41PIN_AB41
    refclk_preserve_bti_ch2/pll_ref_clk[1]PIN_AB14PIN_AN42
    refclk_preserve_bti_ch3PIN_AN15PIN_AN15
    refclk_preserve_bti_ch4PIN_BC18PIN_AB14
       
    tx_pin[0]PIN_R51PIN_AW51
    rx_pin[0]PIN_P48PIN_AW45
    tx_pin[1]PIN_N51PIN_AV54
    rx_pin[1]PIN_K48PIN_AV48
    tx_pin[2]PIN_G51PIN_AU51
    rx_pin[2]PIN_N45PIN_AU45
    tx_pin[3]PIN_D54PIN_AT54
    rx_pin[3]PIN_E45PIN_AT48
    tx_pin[4]PIN_L51PIN_AL51
    rx_pin[4]PIN_F48PIN_AL45
    tx_pin[5]PIN_J51PIN_AK54
    rx_pin[5]PIN_J45PIN_AK48
    tx_pin[6]PIN_C45PIN_AJ51
    rx_pin[6]PIN_K42PIN_AJ45
    tx_pin[7]PIN_D42PIN_AH54
    rx_pin[7]PIN_D36PIN_AH48
    tx_pin[8]PIN_C51PIN_AG51
    rx_pin[8]PIN_E39PIN_AG45
    tx_pin[9]PIN_D48PIN_AF54
    rx_pin[9]PIN_H42PIN_AF48
    tx_pin[10]PIN_C39PIN_AE51
    rx_pin[10]PIN_H36PIN_AE45
    tx_pin[11]PIN_B36PIN_AD54
    rx_pin[11]PIN_C33PIN_AD48

     

    For Intel® Stratix 10® TX Signal Integrity Development Kit, E-Tile PAM4 Configurations:

    Signal NameAssignment in v20.4 and earlierCorrect Assignment
    pll_ref_clk[0]PIN_AB12PIN_AN40
    refclk_preserve_bti_ch0PIN_AN40PIN_BC18
    refclk_preserve_bti_ch1PIN_AB41PIN_AB41
    refclk_preserve_bti_ch2/pll_ref_clk[1]PIN_AB14PIN_AN42
    refclk_preserve_bti_ch3PIN_AN15PIN_AN15
    refclk_preserve_bti_ch4PIN_BC18PIN_AB14
       
    tx_pin[0]PIN_R4PIN_AW51
    tx_pin_n[0]PIN_R5PIN_AW50
    rx_pin[0]PIN_P7PIN_AW45
    rx_pin_n[0]PIN_P8PIN_AW44
    tx_pin[1]PIN_P1PIN_AV54
    tx_pin_n[1]PIN_P2PIN_AV53
    rx_pin[1]PIN_M7PIN_AV48
    rx_pin_n[1]PIN_M8PIN_AV47
    tx_pin[2]PIN_N4PIN_AU51
    tx_pin_n[2]PIN_N5PIN_AU50
    rx_pin[2]PIN_K7PIN_AU45
    rx_pin_n[2]PIN_K8PIN_AU44
    tx_pin[3]PIN_M1PIN_AT54
    tx_pin_n[3]PIN_M2PIN_AT53
    rx_pin[3]PIN_H7PIN_AT48
    rx_pin_n[3]PIN_H8PIN_AT47
    tx_pin[4]PIN_G4PIN_AL51
    tx_pin_n[4]PIN_G5PIN_AL50
    rx_pin[4]PIN_N10PIN_AL45
    rx_pin_n[4]PIN_N11PIN_AL44
    tx_pin[5]PIN_F1PIN_AK54
    tx_pin_n[5]PIN_F2PIN_AK53
    rx_pin[5]PIN_R10PIN_AK48
    rx_pin_n[5]PIN_R11PIN_AK47
    tx_pin[6]PIN_D1PIN_AJ51
    tx_pin_n[6]PIN_D2PIN_AJ50
    rx_pin[6]PIN_E10PIN_AJ45
    rx_pin_n[6]PIN_E11PIN_AJ44
    tx_pin[7]PIN_E4PIN_AH54
    tx_pin_n[7]PIN_E5PIN_AH53
    rx_pin[7]PIN_F13PIN_AH48
    rx_pin_n[7]PIN_F14PIN_AH47
    tx_pin[8]PIN_C10PIN_AG51
    tx_pin_n[8]PIN_C11PIN_AG50
    rx_pin[8]PIN_K13PIN_AG45
    rx_pin_n[8]PIN_K14PIN_AG44
    tx_pin[9]PIN_A10PIN_AF54
    tx_pin_n[9]PIN_A11PIN_AF53
    rx_pin[9]PIN_L16PIN_AF48
    rx_pin_n[9]PIN_L17PIN_AF47
    tx_pin[10]PIN_D13PIN_AE51
    tx_pin_n[10]PIN_D14PIN_AE50
    rx_pin[10]PIN_D19PIN_AE45
    rx_pin_n[10]PIN_D20PIN_AE44
    tx_pin[11]PIN_B13PIN_AD54
    tx_pin_n[11]PIN_B14PIN_AD53
    rx_pin[11]PIN_F19PIN_AD48
    rx_pin_n[11]PIN_F20PIN_AD47

     

    This problem has been fixed starting in version 21.1 of the Intel® Quartus® Prime Pro Software.

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