Article ID: 000075577 Content Type: Troubleshooting Last Reviewed: 09/11/2012

Why doesn't my Stratix IV ES device I/O timing match the report from the TimeQuest Timing Analyzer?



The Assembler in the Quartus® II software versions 9.0, 9.0 SP1, and 9.0 SP2 incorrectly sets some programmable I/O delay chains for Stratix® IV Engineering Sample (ES) devices. This Assembler problem results in ES silicon I/O timing that may not match the I/O timing results reported in the TimeQuest Timing Analyzer for certain I/O paths in Stratix IV ES devices (Stratix IV E, Stratix IV GX, and Stratix IV GT engineering samples).

Patch 2.30 is available to fix this problem in the Quartus II software version 9.0 SP2. If you are using version 9.0 or 9.0 SP1, first download and install the Quartus II Software version 9.0 Service Pack 2. Download the appropriate Quartus II software version 9.0 SP2 patch 2.30 from the following links:

To generate new programming files with correct I/O delay chain settings, install the patch and then re-run the Quartus II Assembler. This patch does not change the I/O timing performance reported in TimeQuest. There is no need to perform a full recompilation.

Also note that timing models for Stratix IV ES devices are still preliminary, and are still subject to change in future software versions.

Related Products

This article applies to 3 products

Stratix® IV E FPGA
Stratix® IV GX FPGA
Stratix® IV GT FPGA



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