Article ID: 000075487 Content Type: Troubleshooting Last Reviewed: 07/12/2021

Why am I unable to dump the LTSSM sequence when using the P-Tile Debug Toolkit?

Environment

  • Intel® Agilex™ F-Series FPGAs and SoC FPGAs
  • Intel® Stratix® 10 DX FPGA
  • Intel® Quartus® Prime Pro Edition
  • Avalon-ST Intel® Stratix® 10 Hard IP for PCI Express
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    Description

    Due to a problem in the Intel® Quartus® Prime Pro Edition software version 21.2, the PCIe* Link Inspector is not available in the P-Tile Debug Toolkit.

    Resolution

    To work around this problem, monitor the ltssm_state port of the P-Tile Avalon® Streaming Intel® FPGA IP for PCI Express* in the Signal Tap Logic Analyzer.

    This problem is scheduled to be fixed in a future release of the Intel® Quartus® Prime Pro Edition software.

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