Article ID: 000075430 Content Type: Troubleshooting Last Reviewed: 08/04/2021

Why does my Intel® HDMI* IP Design Example for Intel Cyclone® 10 GX devices generate Intel Arria® 10 transceiver QSF constraints when using the Intel Quartus® Prime software version 21.1 and earlier?

Environment

  • Intel® Cyclone® 10 GX FPGA
  • Intel® Quartus® Prime Pro Edition
  • HDMI Intel® FPGA IP
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    Description

    Due to a bug in the Intel Quartus Prime software versions 21.1 and earlier, your Intel HDMI IP Design Example for Intel Cyclone 10 GX devices will generate Intel Arria 10 transceiver QSF constraints.

    Resolution

    To fix this problem you can replace the “XCVR_A10" prefix with “XCVR_C10" in the Intel HDMI IP Design Example QSF file.

     

    For example replace the following:

    set_instance_assignment -name XCVR_A10_TX_SLEW_RATE_CTRL SLEW_R5 -to fmc_dp_c2m_p[0]

    set_instance_assignment -name XCVR_A10_TX_SLEW_RATE_CTRL SLEW_R5 -to fmc_dp_c2m_p[1]

    set_instance_assignment -name XCVR_A10_TX_SLEW_RATE_CTRL SLEW_R5 -to fmc_dp_c2m_p[2]

    set_instance_assignment -name XCVR_A10_TX_SLEW_RATE_CTRL SLEW_R5 -to fmc_dp_c2m_p[3]

    set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 31 -to fmc_dp_c2m_p[0]

    set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 31 -to fmc_dp_c2m_p[1]

    set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 31 -to fmc_dp_c2m_p[2]

    set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 31 -to fmc_dp_c2m_p[3]

    set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_PRE_TAP_1T FIR_PRE_1T_POS -to fmc_dp_c2m_p[0]

    set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_PRE_TAP_1T FIR_PRE_1T_POS -to fmc_dp_c2m_p[1]

    set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_PRE_TAP_1T FIR_PRE_1T_POS -to fmc_dp_c2m_p[2]

    set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_PRE_TAP_1T FIR_PRE_1T_POS -to fmc_dp_c2m_p[3]

    set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_PRE_TAP_1T 0 -to fmc_dp_c2m_p[0]

    set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_PRE_TAP_1T 0 -to fmc_dp_c2m_p[1]

    set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_PRE_TAP_1T 0 -to fmc_dp_c2m_p[2]

    set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_PRE_TAP_1T 0 -to fmc_dp_c2m_p[3]

    set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to fmc_dp_c2m_p[0]

    set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to fmc_dp_c2m_p[1]

    set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to fmc_dp_c2m_p[2]

    set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to fmc_dp_c2m_p[3]

    set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to fmc_dp_c2m_p[0]

    set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to fmc_dp_c2m_p[1]

    set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to fmc_dp_c2m_p[2]

    set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_PRE_TAP_2T 0 -to fmc_dp_c2m_p[0]

    set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_PRE_TAP_2T 0 -to fmc_dp_c2m_p[1]

    set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_PRE_TAP_2T 0 -to fmc_dp_c2m_p[2]

    set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_PRE_TAP_2T 0 -to fmc_dp_c2m_p[3]

    set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_2ND_POST_TAP 0 -to fmc_dp_c2m_p[0]

    set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_2ND_POST_TAP 0 -to fmc_dp_c2m_p[1]

    set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_2ND_POST_TAP 0 -to fmc_dp_c2m_p[2]

    set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_2ND_POST_TAP 0 -to fmc_dp_c2m_p[3]

     

    with the following:

    set_instance_assignment -name XCVR_C10_TX_SLEW_RATE_CTRL SLEW_R5 -to fmc_dp_c2m_p[0]

    set_instance_assignment -name XCVR_C10_TX_SLEW_RATE_CTRL SLEW_R5 -to fmc_dp_c2m_p[1]

    set_instance_assignment -name XCVR_C10_TX_SLEW_RATE_CTRL SLEW_R5 -to fmc_dp_c2m_p[2]

    set_instance_assignment -name XCVR_C10_TX_SLEW_RATE_CTRL SLEW_R5 -to fmc_dp_c2m_p[3]

    set_instance_assignment -name XCVR_C10_TX_VOD_OUTPUT_SWING_CTRL 31 -to fmc_dp_c2m_p[0]

    set_instance_assignment -name XCVR_C10_TX_VOD_OUTPUT_SWING_CTRL 31 -to fmc_dp_c2m_p[1]

    set_instance_assignment -name XCVR_C10_TX_VOD_OUTPUT_SWING_CTRL 31 -to fmc_dp_c2m_p[2]

    set_instance_assignment -name XCVR_C10_TX_VOD_OUTPUT_SWING_CTRL 31 -to fmc_dp_c2m_p[3]

    set_instance_assignment -name XCVR_C10_TX_PRE_EMP_SIGN_PRE_TAP_1T FIR_PRE_1T_POS -to fmc_dp_c2m_p[0]

    set_instance_assignment -name XCVR_C10_TX_PRE_EMP_SIGN_PRE_TAP_1T FIR_PRE_1T_POS -to fmc_dp_c2m_p[1]

    set_instance_assignment -name XCVR_C10_TX_PRE_EMP_SIGN_PRE_TAP_1T FIR_PRE_1T_POS -to fmc_dp_c2m_p[2]

    set_instance_assignment -name XCVR_C10_TX_PRE_EMP_SIGN_PRE_TAP_1T FIR_PRE_1T_POS -to fmc_dp_c2m_p[3]

    set_instance_assignment -name XCVR_C10_TX_PRE_EMP_SWITCHING_CTRL_PRE_TAP_1T 0 -to fmc_dp_c2m_p[0]

    set_instance_assignment -name XCVR_C10_TX_PRE_EMP_SWITCHING_CTRL_PRE_TAP_1T 0 -to fmc_dp_c2m_p[1]

    set_instance_assignment -name XCVR_C10_TX_PRE_EMP_SWITCHING_CTRL_PRE_TAP_1T 0 -to fmc_dp_c2m_p[2]

    set_instance_assignment -name XCVR_C10_TX_PRE_EMP_SWITCHING_CTRL_PRE_TAP_1T 0 -to fmc_dp_c2m_p[3]

    set_instance_assignment -name XCVR_C10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to fmc_dp_c2m_p[0]

    set_instance_assignment -name XCVR_C10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to fmc_dp_c2m_p[1]

    set_instance_assignment -name XCVR_C10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to fmc_dp_c2m_p[2]

    set_instance_assignment -name XCVR_C10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to fmc_dp_c2m_p[3]

    set_instance_assignment -name XCVR_C10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to fmc_dp_c2m_p[0]

    set_instance_assignment -name XCVR_C10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to fmc_dp_c2m_p[1]

    set_instance_assignment -name XCVR_C10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to fmc_dp_c2m_p[2]

    set_instance_assignment -name XCVR_C10_TX_PRE_EMP_SWITCHING_CTRL_PRE_TAP_2T 0 -to fmc_dp_c2m_p[0]

    set_instance_assignment -name XCVR_C10_TX_PRE_EMP_SWITCHING_CTRL_PRE_TAP_2T 0 -to fmc_dp_c2m_p[1]

    set_instance_assignment -name XCVR_C10_TX_PRE_EMP_SWITCHING_CTRL_PRE_TAP_2T 0 -to fmc_dp_c2m_p[2]

    set_instance_assignment -name XCVR_C10_TX_PRE_EMP_SWITCHING_CTRL_PRE_TAP_2T 0 -to fmc_dp_c2m_p[3]

    set_instance_assignment -name XCVR_C10_TX_PRE_EMP_SWITCHING_CTRL_2ND_POST_TAP 0 -to fmc_dp_c2m_p[0]

    set_instance_assignment -name XCVR_C10_TX_PRE_EMP_SWITCHING_CTRL_2ND_POST_TAP 0 -to fmc_dp_c2m_p[1]

    set_instance_assignment -name XCVR_C10_TX_PRE_EMP_SWITCHING_CTRL_2ND_POST_TAP 0 -to fmc_dp_c2m_p[2]

    set_instance_assignment -name XCVR_C10_TX_PRE_EMP_SWITCHING_CTRL_2ND_POST_TAP 0 -to fmc_dp_c2m_p[3]

     

    This problem is scheduled to be fixed in a future release of the Intel® Quartus® Prime Pro edition software.

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