Due to a problem with the Quartus® Prime Pro Software version 18.1, you may see the above error in the IP Parameter Editor System Messages pane when trying to generate a 25G Ethernet Stratix® 10 FPGA IP instance for an Stratix® 10 device with H-Tile ES1 or ES2 silicon.
To work around this problem, you must either target an Stratix® 10 device with H-Tile ES3 or Production silicon when creating your project in Quartus® Prime Pro software or you can install the patch below for Quartus® Prime Pro v18.1.
This problem is scheduled to be fixed in a future release of the Quartus® Prime Software.