Article ID: 000075383 Content Type: Troubleshooting Last Reviewed: 08/04/2017

Is the SDI II Sync Bit inserted correctly for ADF words in 6G 8 Streams or 12G 16 streams interleave?

Environment

    Intel® Quartus® Prime Pro Edition
    SDI II Intel® FPGA IP
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Critical Issue

Description

Due to a problem with the Intel® Serial Digital Interface (SDI) II IP core TX, sync bits are not correctly inserted into the ADF words when operating in 6G 8 streams (tx_std = 100) or 12G 16 streams interleave (tx_std = 110) mode. This typically impacts 6G SDI Mode 1 (2160-Line) videos.

Therefore, the Intel SDI II RX IP core, or any receiver which is relying on the presence of the correct ADF words (000h, 3FFh, 3FFh) will not be able to correctly detect the ANC packet.

Resolution

 This issue is fixed starting in Quartus® prime version v17.0.

No work around is available for earlier releases.

Related Products

This article applies to 1 products

Intel® Arria® 10 FPGAs and SoC FPGAs

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