Article ID: 000075356 Content Type: Error Messages Last Reviewed: 11/22/2017

Error(13224): Verilog HDL or VHDL error at altera_pcie_s10_hptxs_tx.sv(<your line number>): index <your index> is out of range [<your range>] for address

Environment

  • Intel® Stratix® 10 FPGAs and SoC FPGAs
  • Intel® Quartus® Prime Pro Edition
  • Avalon-MM Intel® Stratix® 10 Hard IP for PCI Express
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT

    Critical Issue

    Description

    Due to a problem in the Intel® Quartus® Prime software, you will see this error with the Avalon®-MM Stratix® 10 Hard IP for PCI Express* if you do the following:

    • Select "Enable high performance bursting Avalon-MM slave interface (HPTXS)" 
    • And select "Enable mapping (HPTXS)"
    • AND select one of the first two choices
      • 1 page - 0 bits
      • 2 pages - 1 bit
    Resolution

    To work around this issue, choose one of the remaining 8 page mapping selections.

    This problem is scheduled to be fixed in a future Quartus Prime software release.

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