You may encounter the following report at the Ignored Assignments section in the Fitter report when you build QDRII controller with UniPHY in your design.
Name: Synchronizer Identification
Ignored Entity: qdrii_ctl_read_datapath
Ignored Value: FORCED_IF_ASYNCHRONOUS
Ignored Source: Compiler or HDL Assignment
This is reported because HDL Assginment was ignored during Synthesis.
You should enable Timing-Driven Synthesis in the Analysis & Synthesis Settings to remove this report.