Article ID: 000075257 Content Type: Troubleshooting Last Reviewed: 09/11/2012

set_max_skew constraint might not properly constrain the design

Environment

    Quartus® II Subscription Edition
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Critical Issue

Description

In the Quartus® II software versions 11.0, in the TimeQuest Timing Analyzer, the rise_from_clock, rise_to_clock, fall_from_clock and fall_to_clock options of the set_max_skew constraint do not properly constrain the design.

Resolution

Use the from_clock and to_clock options and use an explicit clock collection instead of "*". For example, use [get_clocks *] or [all_clocks] instead of "*".

This issue is corrected in the Quartus II software version 11.0 SP1.

Related Products

This article applies to 1 products

Intel® Programmable Devices

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