Article ID: 000075114 Content Type: Error Messages Last Reviewed: 08/23/2012

Critical Warning (21214): Placement of some of the LVDS pin or pins related to the instance may not comply to the existing ALTLVDS DPA mode (with or without Soft CDR) pin restriction guidelines.


  • Quartus® II Subscription Edition

    You will see this critical warning beginning in the Quartus® II software version 12.0 anytime you use ALTLVDS receivers in Stratix® III, Stratix IV, Arria® II,  HardCopy® III, or HardCopy IV devices.  The critical warning is issued even if your ALTLVDS instance does not use DPA or soft-CDR enabled channels.  This is to notify you that there are placement restrictions in the event you decide to enable DPA or soft-CDR mode in the future.


    Refer to the placement restrictions detailed in the related solution below to see if your design is affected. 

    This critical warning can be ignored if the design does not use DPA or soft-CDR enabled receiver channels.

    Related Products

    This article applies to 10 products

    Arria® II GX FPGA
    Arria® II GZ FPGA
    HardCopy™ IV GX ASIC Devices
    HardCopy™ IV E ASIC Devices
    Stratix® IV GT FPGA
    Stratix® IV GX FPGA
    Stratix® IV E FPGA
    Stratix® IV FPGAs
    HardCopy™ III ASIC Devices
    Stratix® III FPGAs



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