Article ID: 000075064 Content Type: Troubleshooting Last Reviewed: 02/24/2014

Errata - Known Arria V timing model issues in Quartus II software version 12.1 SP1


  • Quartus® II Subscription Edition

    Critical Issue


    Timing models for Arria® V devices have been updated in the Quartus® II software version 13.0 to address issues in version 12.1 SP1. These changes affect devices which had been designated with "Final" timing status in the Quartus II software version 12.1 SP1.

    I/O delays are incorrect for the 5AGXB5 device

    A software error in the Quartus II software version 12.1 SP1 caused significant errors in I/O delays for 5AGXB5 devices.

    Logic and routing delays have errors

    A software error in the Quartus II software version 12.1 SP1 and earlier caused minor timing modeling errors for some logic and routing delays (typically <20 ps), and larger errors in clock delays related to transceiver PMA and external memory interfaces (up to 650 ps in some cases) for all Arria V devices.

    HSSI clock delay is incorrect

    The clock delay on IQTXRXCLK lines, which appears on the direct clock paths from PCS/PMA to fPLL, is incorrect due to a missing timing path.


    If your design targets a 5AGXB5 device, or targets another Arria V device and uses external memory interfaces or transceivers, or if you are debugging an issue that could be timing-related even though the TimeQuest timing analyzer reports no timing errors, re-run timing analysis in the Quartus II software version 13.0 as follows:

    • Back up the design database.
    • Open the design in the earlier Quartus II software version, and then export the database. On the Project menu, click Export Database. When you are prompted, export the database to the suggested export_db directory.
    • Start the Quartus II software version 13.0 or later.
    • Open the project. When you are prompted whether to overwrite the older database version, click Yes, and import the database from the export_db directory.
    • Run the TimeQuest timing analyzer on the design.

    If there are timing violations, run the Fitter in the Quartus II software version 13.0 or later to close timing on the design.

    Related Products

    This article applies to 5 products

    Arria® V GT FPGA
    Arria® V GZ FPGA
    Arria® V ST SoC FPGA
    Arria® V SX SoC FPGA
    Arria® V GX FPGA