Article ID: 000075047 Content Type: Troubleshooting Last Reviewed: 01/28/2014

Why does the Arria V VHDL PCI Express example design fail to simulate in the Synopsys VCS simultion tool?


  • Quartus® II Subscription Edition
  • Simulation

    Due to a problem in the Quartus® II Software version 13.1, errors may be seen when simulating the VHDL PCI Express Qsys example design using the autogenerated simulation scripts for the Synopsys VCS_MX tools.

    You may see one of the following errors:

    Error-[MPD] Module previously declared
      The module was previously declared at:
      It is redeclared later at:

    Error-[URMI] Unresolved modules
     ./../..//pcie_de_gen1_x4_ast64_tb/simulation/submodules/altpcietb_bfm_top_rp.v, 454
      "altpcietb_bfm_log_common bfm_log_common( .dummy_out (bfm_log_common_dummy_out));"
      Module definition of above instance is not found in the design.


    To workaround this problem in the Quartus II Software version 13.1 follow the steps below:

    Open the generated simulation script <path>/testbench/simulation/vcsmx/ in a text editor
    Update USER_DEFINED_ELAB_OPTIONS to add in the required library include path:

    USER_DEFINED_ELAB_OPTIONS="-y ../../<design name>_tb/simulation/submodules/"
    Open the following file in a text editor:  <path>/testbench/<design name>_tb/simulation/submodules/altpcietb_bfm_rp_gen2_x8.v

    Locate the dupicate module definition by searching for module altpcietb_bfm_log_common and comment out the second instance (Lines 888-1247)
    Re-run the simulation script  ./

    This problem is scheduled to be fixed in a future version of the Quartus II software

    Related Products

    This article applies to 4 products

    Arria® V SX SoC FPGA
    Arria® V ST SoC FPGA
    Arria® V GX FPGA
    Arria® V GT FPGA



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